SystemVerilog for Design Second Edition

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Sprache: Englisch

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Beschreibung

In its updated second edition, this book has been extensively revised on a chapter by chapter basis to include the many text and example updates needed to reflect changes adopted between the first edition of the book and the finalization of the new standard. The book accurately reflects the syntax and semantic changes to the SystemVerilog language, making it an essential reference for systems professionals who need the latest version information. In addition, the second edition features a new chapter that explains the SystemVerilog "packages", a new appendix that summarizes the synthesis guidelines presented throughout the book, and all of the code examples have been updated to the final syntax and rerun using the latest version of the Synopsys, Mentor, and Cadance tools.

Zusammenfassung

Inhaltsverzeichnis

to SystemVerilog.- SystemVerilog Declaration Spaces.- SystemVerilog Literal Values and Built-in Data Types.- SystemVerilog User-Defined and Enumerated Types.- SystemVerilog Arrays, Structures and Unions.- SystemVerilog Procedural Blocks, Tasks and Functions.- SystemVerilog Procedural Statements.- Modeling Finite State Machines with SystemVerilog.- SystemVerilog Design Hierarchy.- SystemVerilog Interfaces.- A Complete Design Modeled with SystemVerilog.- Behavioral and Transaction Level Modeling.

Details

Erscheinungsjahr:	2010
Fachbereich:	Nachrichtentechnik
Genre:	Importe , Technik
Rubrik:	Naturwissenschaften & Technik
Medium:	Taschenbuch
Inhalt:	xxx 418 S.
ISBN-13:	9781441941251
ISBN-10:	1441941258
Sprache:	Englisch
Einband:	Kartoniert / Broschiert
Autor:	Sutherland, Stuart Davidmann, Simon Flake, Peter
Auflage:	Second Edition 2006
Hersteller:	Springer Springer US, New York, N.Y.
Verantwortliche Person für die EU:	Springer Verlag GmbH, Tiergartenstr. 17, D-69121 Heidelberg, juergen.hartmann@springer.com
Maße:	235 x 155 x 25 mm
Von/Mit:	Stuart Sutherland (u. a.)
Erscheinungsdatum:	29.10.2010
Gewicht:	0,674 kg